siliconblue CREG rect R0

Frame	Bit
	B0	B1	B2	B3	B4	B5
F0	~MISC:LOW_POWER	-	-	-	MISC:COLD_BOOT	MISC:WARM_BOOT

MISC:COLD_BOOT	0.F0.B4
MISC:WARM_BOOT	0.F0.B5
non-inverted	[0]

MISC:LOW_POWER	0.F0.B0
inverted	~[0]

siliconblue SPEED rect R0

Frame	Bit
	B0	B1
F0	SPEED:SPEED[0]	SPEED:SPEED[1]

SPEED:SPEED	0.F0.B1	0.F0.B0
LOW	0	0
MEDIUM	0	1
HIGH	1	0