I2C glitch filter

Tile I3C

Cells: 2

Bel IO0_I3C

siliconblue I3C bel IO0_I3C
Pin	Direction	Wires
PU_ENB	input	TCELL0:IMUX.LC6.I0
WEAK_PU_ENB	input	TCELL0:IMUX.LC4.I0

Bel IO1_I3C

siliconblue I3C bel IO1_I3C
Pin	Direction	Wires
PU_ENB	input	TCELL0:IMUX.LC7.I0
WEAK_PU_ENB	input	TCELL0:IMUX.LC5.I0

Bel FILTER0

siliconblue I3C bel FILTER0
Pin	Direction	Wires
FILTERIN	input	TCELL0:IMUX.LC1.I0
FILTEROUT	output	TCELL0:OUT.LC2

Bel FILTER1

siliconblue I3C bel FILTER1
Pin	Direction	Wires
FILTERIN	input	TCELL0:IMUX.LC0.I0
FILTEROUT	output	TCELL0:OUT.LC1

Bel wires

siliconblue I3C bel wires
Wire	Pins
TCELL0:IMUX.LC0.I0	FILTER1.FILTERIN
TCELL0:IMUX.LC1.I0	FILTER0.FILTERIN
TCELL0:IMUX.LC4.I0	IO0_I3C.WEAK_PU_ENB
TCELL0:IMUX.LC5.I0	IO1_I3C.WEAK_PU_ENB
TCELL0:IMUX.LC6.I0	IO0_I3C.PU_ENB
TCELL0:IMUX.LC7.I0	IO1_I3C.PU_ENB
TCELL0:OUT.LC1	FILTER1.FILTEROUT
TCELL0:OUT.LC2	FILTER0.FILTEROUT

Bitstream

siliconblue I3C rect R0
Frame	Bit
Frame

siliconblue I3C rect R1
Frame	Bit
Frame	B0	B1	B2	B3	B4	B5	B6	B7
F0	-	-	-	-	-	-	-	-
F1	-	-	-	-	-	-	-	-
F2	-	-	-	-	-	-	-	FILTER0:ENABLE[0]
F3	-	-	-	-	-	-	-	FILTER0:ENABLE[1]
F4	-	-	-	-	-	-	-	FILTER1:ENABLE[0]
F5	-	-	-	-	-	-	-	FILTER0:ENABLE[2]
F6	-	-	-	-	-	-	-	FILTER1:ENABLE[1]
F7	-	-	-	-	-	-	-	FILTER1:ENABLE[2]

FILTER0:ENABLE	1.F5.B7	1.F3.B7	1.F2.B7
FILTER1:ENABLE	1.F7.B7	1.F6.B7	1.F4.B7
non-inverted	[2]	[1]	[0]